A trend in modern integrated circuits (ICs) is to include more and larger memory circuits on chip (e.g., embedded memory) for performing various functions of the IC. There is also a trend to shrink geometries (e.g., feature sizes) of circuit elements in the IC to thereby increase the number of functions incorporated into the IC and/or to reduce die size, and thereby reduce manufacturing cost. Unfortunately, these two objectives have significantly increased the total power consumption in the IC. Moreover, the percentage of total power consumption in the IC attributable to memory circuits has increased dramatically.
Memory circuits are operated at greater speeds with higher applied voltage, and therefore exhibit higher active and leakage power consumption in an IC. IC manufacturing process and variations within the manufacturing process (i.e., process variations) also influence power consumed by the memory circuits. For example, a fast IC process typically produces transistors and other circuit elements which tend to operate at relatively fast speeds but which consume relatively high power compared to a normal IC fabrication process. Alternatively, a slow IC process typically produces transistors and other circuit elements that tend to consume relatively low power but operate at relatively slow speeds compared to a normal IC fabrication process. Accordingly, a trade-off between power consumption and speed exists.
Temperature also affects memory speed and power consumption in the IC, primarily due to leakage current. In general, transistor leakage current may be defined as current conducted by a transistor when it is in the “off” (i.e., nonconductive) state. More particularly, source-to-drain leakage current may be defined as current conducted by a field-effect-transistor (FET) between the source and drain terminals when it is in the “off” (i.e., nonconductive) state. Gate leakage current may be defined as current conducted from the gate to the source, drain, and/or substrate of a FET. Leakage current in an IC is dependent on temperature and voltage as well as IC process and process variations (e.g., process, voltage and/or temperature (PVT) variations).
Various techniques have been proposed which attempt to maintain power consumption attributable to memory circuits in an IC at or below prescribed threshold levels, including, for example, reducing performance in the memory circuits (e.g., reducing speed), selective power-down of memory sub-arrays, and supplying memory circuits with one voltage while supplying memory peripheral circuits with a different voltage. It is also known to use process monitors in the IC. Standard process monitors are typically comprised of a small number of circuit structures located external to the memory circuits which are operative to approximate certain process-related parameters of the IC. However, such conventional process monitors directed to the general IC are not capable of adequately measuring operational performance within the memory circuits. Consequently, techniques for optimizing power consumption in the memory circuits, which contribute to an ever-increasing percentage of the overall IC power consumption, are ineffective.